======================================================== memory_map - translate multiport memories to basic cells ======================================================== .. raw:: latex \begin{comment} .. cmd:def:: memory_map :title: translate multiport memories to basic cells .. code:: yoscrypt memory_map [options] [selection] :: This pass converts multiport memory cells as generated by the memory_collect pass to word-wide DFFs and address decoders. .. code:: yoscrypt -attr ! :: do not map memories that have attribute set. .. code:: yoscrypt -attr [=] :: for memories that have attribute set, only map them if its value is a string (if specified), or an integer 1 (otherwise). if this option is specified multiple times, map the memory if the attribute is to any of the values. .. code:: yoscrypt -iattr :: for -attr, ignore case of . .. code:: yoscrypt -rom-only :: only perform conversion for ROMs (memories with no write ports). .. code:: yoscrypt -keepdc :: when mapping ROMs, keep x-bits shared across read ports. .. code:: yoscrypt -formal :: map memories for a global clock based formal verification flow. This implies -keepdc, uses $ff cells for ROMs and sets hdlname attributes. It also has limited support for async write ports as generated by clk2fflogic. .. raw:: latex \end{comment} .. only:: latex :: memory_map [options] [selection] This pass converts multiport memory cells as generated by the memory_collect pass to word-wide DFFs and address decoders. -attr ! do not map memories that have attribute set. -attr [=] for memories that have attribute set, only map them if its value is a string (if specified), or an integer 1 (otherwise). if this option is specified multiple times, map the memory if the attribute is to any of the values. -iattr for -attr, ignore case of . -rom-only only perform conversion for ROMs (memories with no write ports). -keepdc when mapping ROMs, keep x-bits shared across read ports. -formal map memories for a global clock based formal verification flow. This implies -keepdc, uses $ff cells for ROMs and sets hdlname attributes. It also has limited support for async write ports as generated by clk2fflogic.